Monday, 25 April 2016



  • A processor can operate on an entire vector in one instruction
  • Work done automatically in parallel (simultaneously)
  • The operand to the instructions are complete vectors instead of one element
  • Reduce the fetch and decode bandwidth
  • Data parallelism
  • Tasks usually consist of:
  1. Large active data sets
  2. Poor locality
  3. Long run times 

The three major categories to exploit parallelism:

Instruction-level parallelism (ILP)
Multiple instructions from one instruction stream are executed simultaneously

Thread-level parallelism (TLP)
Multiple instruction streams are executed simultaneously

Vector data parallelism (DP)
The same operation is performed simultaneously on arrays of elements

Vector Length :
  • VMIPS has a vector length of 64. But in real world applications vector lengths are not exactly 64. For example, adding just first n elements of a vector.
  • Vector Length register is used for this purpose.
  • VLR controls the length of any vector operation by defining their length.
  • Its value cannot be greater than the length of the vector registers.(64 in this case)
  • This works when the length of data is less than the Maximum Vector Length of a processor. But in real world applications, data in vectors in memory can be greater than the MVL of the processor.
  • In this case, we use a technique called Strip Mining.

Article by
St.Mary's Group
IT Dept.